In a synchronous DRAM, viz., an SDRAM (Synchronous Dynamic Random Access Memory), the read-out/write-in operation is carried out by setting a memory bank to an activated or opened state and receiving a read-out or write-in command, a bank address and a column address for in-page data of the opened memory bank. The read-out or write-in operations may be carried out in succession for a plurality of the memory banks that are in opened states. This operation is termed a bank interleaved access.
A multi-bank semiconductor memory device, that is, a semiconductor memory device with a plurality of banks is described for example in Patent Document 1.
[Patent Document 1]
JP Patent Kokai Publication No. JP-A-11-086541A